Eecient Integer Multiplication Overrow Detection Circuits

Multiplication of two n-bit integers produces a 2n-bit product. To allow the result to be stored in the same format as the inputs, many processors return the n least signiicant bits of the product and an overrow ag. This paper describes methods for integer multiplication with overrow detection for unsigned and two's complement numbers. A method for combining unsigned and two's complement integer multiplication with overrow detection is also presented. The overrow detection circuits presented in this paper have O(n) gates and O(log(n)) delay, which makes them more eecient than previous overrow detection circuits.